MediaTek is set to launch the Helio P70, the successor to Helio P60 chipset by the end of this month. The Helio P60 was announced this February and has turned out to be quite popular among smartphone makers. According to reports, the chipsets is said to be powering around 15 smartphones right now and with Helio P70, it could be looking to further enhance its market share.
The MediaTek Helio P70 is expected to be very similar to that of the Helio P60 and it will be built on the same 12nm process. It will be an octa-core processor with four Cortex A73 acting as performance cores and four Cortex A73 acting as efficiency cores. The graphics duty will be handled by a Mali-G72 GPU but there is no clarity on the CPU clock speed or count of GPU cores just yet. But, it seems like the processor count or GPU performance won’t be the key upgrades this year.
While MediaTek Helio P60 was introduced as Taiwanese chipmaker’s AI-focused chipset with a dedicated “AI processing unit”. The APU on the MediaTek Helio P70 will switch to a Neural Processing Unit (NPU), which should result in higher performance, compared to its predecessor.
MediaTek Helio P70 will be the direct competitor to Snapdragon 710, which was unveiled recently as a mid-range processor. However, it is not clear why MediaTek is calling the AI unit as NPU instead of APU. The APU on MediaTek Helio P60 was a dual core unit and there is a possibility that we will see a different architecture with Helio P70.
MediaTek has been trying to challenge Qualcomm in the entry-level and mid-range segment of mobile processor business. Its Helio P22 and Helio P60 have proven to be popular among smartphone makers but it supplies only a fraction of what Qualcomm does. With the new chipset, MediaTek will be hoping to bring more Chinese smartphone makers on its platform, as it has done in the budget segment.
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Apart from Helio P70, MediaTek is also reported to begin mass production of 7nm ASIC (application-specific integrated circuits) for gaming customers. Digitimes reports that the chip would be built using 56G PAM4 SerDes IP based on a 7nm FinFET process by the end of this year.